הטכניון מכון טכנולוגי לישראלXyz
הטכניון מכון טכנולוגי לישראל - בית הספר ללימודי מוסמכים 
Ph.D and MS.c Theses, since 1988.


Advisor Professor Avi Mendelson
Advisor's Email mendlson@cs.technion.ac.il
Advisor's Home-Site  
No of theses 42
Department Computer Science
Department Web Site www.cs.technion.ac.il


No.   Student's Name Graduation
Year
Degree Abstracts Research Name
 1 Karbachevsky Alex 2021 MSc Abstracts Complexity Measurement of Neural Networks on Hardware Deployment
 2 Recher Dan 2021 MSc Abstracts uVP: Efficient Implementation of Value Prediction via Micro-Op Cache
 3 Shomroni Uri 2020 MSc Abstracts Performance Prediction of Programs on Heterogeneous and Massively-Parallel Architectures
 4 Azriel Leonid 2020 PhD Abstracts From Device Level to Systems - Advance Topics in Hardware Security
 5 Faina Orit 2020 MSc Abstracts Can We Trust a TEE-Based Sim?
 6 Liss Natan 2019 MSc Abstracts Neural Network Quantization for Integer-Only Inferencing on an FPGA
 7 Bar Lev Lior 2019 MSc Abstracts Characterizing a Data Routing Algorithm for Fault Tolerant Real-Time NoC Systems
 8 Fuchs Amit 2018 MSc Abstracts Fault-Tolerant Operanting System for Many-Core Processors
 9 Gaizman Natalie 2018 MSc Abstracts CAN Bus Protocol with an Emphasis on the Security Aspect Security Aspect
 10 Nishry Oren 2018 MSc Abstracts PUF:Survey on Physical Unclonable Function Hardware Implementation and Security-Based Application
 11 Baskin Chaim 2017 MSc Abstracts Streaming Architecture for Large-Scale Quantized Neural Networks on an FPGA Based Dataflow Platform
 12 Kedar Gil 2017 PhD Abstracts Hardware/Software Co-Design to Minimize Energy in Real-Time Systems
 13 Verner Uri 2016 PhD Abstracts Processing Real-time Data Streams on GPU-based Systems
 14 Jioussy Rami 2015 MSc Abstracts Enhancing Energy-Performance for Power Constrained SoC Systems
 15 Rotem Efraim 2015 PhD Abstracts High Performance Computing in Physically Constrained Environment
 16 Azriel Leonid 2014 MSc Abstracts Peripheral Memory: Analysis of its Impact on Performance of a General Purpose Computer System
 17 Igra Idan 2014 MSc Abstracts Constructive Conflict Resolution for Transactional Memory
 18 Yuval Gad 2013 MSc Abstracts Architectural Considerations for DSP Processors Supporting Intense Real-Time DSP Applications
 19 Tolchinsky Igor 2012 MSc Abstracts Rethinking Locality in NUMA Systems
 20 Lavro Anton 2011 MSc Abstracts An EDGE Co-Processor for a RISC CPU: Architecture, Performance and Power Analysis
 21 Malits Roman 2011 MSc Abstracts The Potential of Global Scheduling to Improve Utilization in Wide SIMD GPGPU Architectures
 22 Zobel Shmuel 2010 MSc Abstracts Power Performance Tradeoffs in Graphics/GPGPU Based Systems
 23 Damishian Chen 2010 MSc Abstracts Stride Based Dead Block Correlation Prefetcher - A New Long-Latency-Tolerant Data Cache Prefetcher
 24 Sinyuk Konstantin 2009 MSc Abstracts User Driven Virtualization for Mobile Platforms
 25 Sorani Iris 2008 MSc Abstracts Long Instruction Traces and their Usage
 26 Geller Ishay 2008 MSc Abstracts Dataflow Trace Cache (DFTC): A Dynamic Translation Processor Architecture for Power-Efficient High-Performance Execution
 27 Katzengold Oren 2006 MSc Abstracts Effective Use of Trace Caches
 28 Behar Michael 2006 MSc Abstracts Characterization of Hot Traces in Modern Processors
 29 Timor Aviel 2006 MSc Abstracts Using Under-Utilized CPU Resources to Enhance its Reliability
 30 Gendler Alexander 2005 MSc Abstracts A Multi-Prefetcher Mechanism Based on a Prefecher Assessment Buffer (PAB)
 31 Khamaisee Assad 2004 MSc Abstracts Combining Trace Cache with Value Prediction in Microprocessors
 32 Kosyakovsky Oleg 2002 MSc Abstracts Approaches to Managing Trace Cache in Computer Systems
 33 Gabbay Freddy 1999 PhD
Speculative Execution Based on Value Prediction
 34 Vinov Michael 1997 MSc
The Dynamic Characterization of Fine-Grain Parallelizm and Its Usage for Supporting Multithreaded Architectures
 35 Menaker Ohad 1996 MSc
Survey on Multi-Threaded Implementations
 36 Bekerman Michael 1996 MSc
Architecture of Processor with Simultaneous Execution Of Multiple Instruction Streams
 37 Gabbay Freddy 1996 MSc
Tmoesi - a New Cache Coherency Protocol for Distributed Multi-Cache Systems
 38 Shavitt Nira 1995 MSc
Mapping Dynamic Parallel Programs Into Parallel Systems
 39 Ramati Naftali 1995 MSc
Developing Fault Injection S-W for R.t. Systems Evaluation
 40 Falik Ohad 1995 MSc
Improving Data Availability in Advanced Memory Architectures
 41 Zimerman Offer 1994 MSc
Using "Write"Only Cache" for Improring "Cacne Based" Systems
 42 Bitan Avraham 1993 MSc
Asymptotic Performance Evaluation of Computer Memory Models

Last updated on: Tuesday ,April 13, 2021