M.Sc Thesis

M.Sc StudentWald Nimrod
SubjectUse of Memristor Based Logic Circuits for Beyond
Von Neumann Computer Architectures
DepartmentDepartment of Electrical and Computer Engineering
Supervisor ASSOCIATE PROF. Shahar Kvatinsky
Full Thesis textFull thesis text - English Version


Resistive switching technologies such as RRAM, STT-MRAM and PCM have become increasingly prevalent over the last decade. Devices built with these technologies, often called memristors, exhibit a resistance that depends on voltages/currents that are applied to them. This property enables using them as novel memory devices. When combined with the fact that many of the fabricated memristors exhibit nonlinear behavior, a memristor’s state (resistance) may be used as a logic state (`0'/`1') in logic applications. Logic circuits containing exclusively memristors, or combining Memristors and CMOS technology, have been proposed in prior work done at the Technion and elsewhere. Several previously proposed logic techniques include gates that cannot be fabricated within a memristive crossbar, such as the pure memristive ratioed AND and OR gates (MRL). Others, such as a memristor aided logic (MAGIC) NOR gate, are naturally fabricated within a crossbar structure. By employing the latter logic techniques to a memristive memory, new architectures become possible for performing computations within the memory, breaking the von Neumann paradigm.

This work deals with several aspects in the process of designing a functional memristive Memory Processing Unit (mMPU). The mMPU is a logic enabled memristive memory which is capable of performing computations within the memory cells themselves, thus allowing to offload a portion of a CPU's workload. The conceptual design and several algorithmic aspects of the mMPU have been presented in previous work. However, the fabrication of a functioning mMPU to be integrated in computer systems requires work to be done on memristive logic gate design and circuit design aspects, which are addressed in this work. 

First, a methodological approach for the construction of novel memristive logic gates is presented. The methodology allows circuit designers to systematically invent new logic techniques by exploring the logic functionality of new topologies and various types of devices.

Second, the issue of process variations in memristive circuits and its effect on logic gate performance is studied. A sensitivity analysis is performed with respect to various device, circuit and environmental parameters in order to determine how a change in each of them affects the functionality of the logic circuit. The notion of process corners is introduced in the context of memristive circuits to allow taking variations into account when designing circuits that contain memristors.

Finally, a design for a memristive memory integrated circuit (IC) is presented. The IC contains two arrays of memristive memory (1Kb in size) capable of executing logic functions, a control circuit, and various characterization and testing circuits. The IC has been fabricated using a 90nm process in an industrial fab.