טכניון מכון טכנולוגי לישראל
הטכניון מכון טכנולוגי לישראל - בית הספר ללימודי מוסמכים  
Ph.D Thesis
Ph.D StudentKvatinsky Shahar
SubjectMemristor-Based Circuits and Architectures
DepartmentDepartment of Electrical Engineering
Supervisors Professor Emeritus Avinoam Kolodny
Professor Emeritus Uri Weiser
Professor Aby Friedman
Full Thesis textFull thesis text - English Version


Abstract

Advancements in computer capabilities in the last fifty years had been closely linked to miniaturization of CMOS technology, while the structure of digital computing systems has been based on von Neumann architecture, where the memory and execution units are separated. Recently, device scaling has slowed down, while electrical interconnect has become both performance and power bottlenecks. Conventional memory technologies are unable to keep up with market requirements for higher density and lower power.

These problems can be addressed by emerging new devices, such as memristors, which are useful both as memory cells and as novel switching circuits which can be used to augment CMOS gates. Memristors are two-terminal resistors, where the resistance serves as a stored variable and can be changed by the electrical current. These new devices hold promise to provide continued growth in functional density. The primary focus of this thesis is on architecturally integrating memory with computational capabilities, based on exploiting memristors. These memristor-based structures will greatly enhance the speed and power of digital computing beyond Moore scaling, while maintaining compatibility with CMOS technology. From an architectural viewpoint, memristor-based circuits will lead to innovative memory-intensive computing structures and systems.

The focus of this research is on developing memristor-based applications at the circuit and architecture levels. Memristors are investigated from the point of view of circuit designer and computer architect, including modeling a general memristor model - TEAM - to fit different memristive technologies. The TEAM model requires low computational effort and sufficiently accurate.

Various logic circuits have been proposed and design methodologies for them are developed. IMPLY, MAGIC, and Akers logic arrays are logic families that can be performed within memristive memories, enabling in-memory computing. MRL is a different logic family used for hybrid CMOS-memristor logic gates to increase the logic density.

Additionally, the multistate register, a novel memory structure that stores multiple values within a single register, is proposed.  A multistate register is designed based on an RRAM crosspoint array on top of a CMOS register with a relatively low area (a single state in a multistate register is 1.3% of a stored state in CMOS register). The multistate register is embedded within CPU pipelines to enable memory intensive architectures, such as CFMT. CFMT is a multithreaded processor with high performance and low energy, designed and implemented with an FPGA, presenting a performance improvement of 32% on average with an energy reduction of 8.5%, as compared to SoE MT.