|M.Sc Student||Ben Yishay Roee|
|Subject||MEMS Inductors and their Applications in Low Noise RF-CMOS|
|Department||Department of Electrical Engineering||Supervisor||Professor Emeritus Yael Nemirovsky|
|Full Thesis text - in Hebrew|
CMOS based RF modules employ inductors for various purposes. Such inductors exhibit poor quality factor (Q) and low self resonance frequency which often limit the circuit's overall performance. This research explores the possibility to enhance CMOS inductors performance by removing the surrounding dielectrics and underlying silicon substrate in a post-processing technique, which results in a free-hanging structure with reduced parasitics. Measurements show improvement of up to 60% in quality factor and up to 90% in self resonance frequency. Although previous work demonstrated such concept in the past, they mainly focused on stand-alone inductors (rather than integrated in circuits) and high cost, CMOS incompatible techniques. This study presents a front-side RIE (Reactive Ion Etch) process, which is a standard step in any fabrication facility and proven beneficial for a large variety of inductors geometries. This technique may be applied either by using a low cost single mask or by utilizing the CMOS final metallization layer as build-in mask which grants the alignment accuracy and resolution provided by the CMOS process and further reduces the fabrication cost.
Analytical model for the micromachined inductor is proposed to enable to predict its effect on circuits' performance, with focus on noise performance.
To demonstrate circuit-level integration feasibility, such post-processing was implemented on a 4GHz low noise amplifier (LNA) and a wideband (4-6GHz) voltage controlled oscillator (VCO), fabricated in Tower-Jazz 0.18μm CMOS process.
In the LNA inductors are used both in the input and output matching networks that provide noise matching and maximize the gain respectively. High-Q inductors are required, as the amplifier's noise figure is largely dominated by the input matching network insertion loss. Measurements, simulations and analytical model show improvement of 0.5dB in noise figure, while providing 14.5dB power gain and consuming DC power of 18mW.
A wideband VCO is a challenging design due to the strong tradeoff between bandwidth and noise performance. The circuit is based on cross-coupled cell with parallel resonator, consists of switched capacitor array and inductor. The VCO's phase noise is partially determined by the resonator's quality factor and a 2dB phase noise improvement is predicted in simulation while achieving tuning range of 48% and consuming DC power of 25mW.
To the best of our knowledge, this work is first to demonstrate CMOS low noise LNA and VCO with micromachined inductors fabricated in low cost CMOS compatible RIE post-processing.