M.Sc Thesis

M.Sc StudentElyada Avshalom
SubjectLow-Complexity Policies for Energy-Performance Tradeoff
in Chip-Multi-Processors
DepartmentDepartment of Electrical and Computer Engineering
Supervisors PROFESSOR EMERITUS Uri Weiser


Chip-Multi-Processors (CMP) enable processor architects to deliver continuously increasing processor performance while still maintaining an efficient ratio of performance to energy-consumption. In order to utilize the CMP's resources, the running software application should be split into multiple tasks and run in parallel on the CMP's Processing Elements (PE). Dynamic frequency-Voltage Scaling (DVS) is a widely practiced and researched technique in which performance and energy consumption are balanced by dynamically varying a PE's frequency-voltage working-point in order to save energy while meeting performance requirements. This work addresses DVS policies for Energy-Performance tradeoff on a CMP with DVS-capable PEs. We consider a multi-task application running on the CMP, with individual tasks that have unknown workloads. We try to dynamically set each PE’s frequency-voltage working point in order to minimize a chosen energy-performance cost function. Current methods described in the literature typically use optimization techniques to try and solve for a general task-graph case. However, due to the complexity of such approaches and their demand for large computation resources, real-time implementation and integration into performance-driven, energy-aware systems may be impractical. As an alternative, we offer some simple, heuristic DVS policies for a more specific case of task-graph. By comparing our policies' results to those of a theoretical best-case solution, we show that these lightweight heuristics are viable and practical alternatives when considering complexity. In particular, we show that in most cases a very simple policy is the most-cost-effective.