|M.Sc Student||Milter Oleg|
|Subject||Synthesis of CMOS VLSI Circuits Considering Digital Noise|
|Department||Department of Electrical and Computer Engineering||Supervisor||PROFESSOR EMERITUS Avinoam Kolodny|
As CMOS technology scales into the deep submicron (DSM) regime, digital noise is becoming a metric of comparable importance to area, timing, and power, for analysis and design of CMOS VLSI systems.
Noise has two detrimental effects in digital integrated circuits: First, it can destroy logical information carried by a circuit node. Second, even when noise does not cause complete functional failure, it might cause delay uncertainty: Non-critical paths might become critical because of noise. As a result, circuit speed becomes limited by noise.
This work presents an analysis of on-chip crosstalk, and proposes a design flow to automatically synthesize CMOS circuits that have improved robustness to noise effects. Results of design experiments are presented