M.Sc Thesis

M.Sc StudentDolev Noam
SubjectIntegrated Low-Voltage Delta-Sigma Conversion Circuits
in Digital CMOS Technology
DepartmentDepartment of Electrical and Computer Engineering
Supervisor PROFESSOR EMERITUS Avinoam Kolodny


Scaling of silicon process technology enables one to integrate more functionality into the personal computer processor chip, such as graphics, communication and sound - functions that traditionally were located on the motherboard, external to the processor. Such integration enables to reduce the total cost of the system, and to create cheaper personal computers. It also enables to create smaller systems, which is mainly important for notebook computers.

This work investigates the feasibility of implementing a Sigma-Delta - Analog to Digital Converter in a state-of-the-art 0.13-micron digital-CMOS technology, for integration of sound function into the processor chip.

The scaled CMOS technology that is used to manufacture the processor is optimized for the highest clock frequency and low power with minimum cost. Those requirements from the process provide a very limited set of building blocks for the analog design, which is characterized by poor analog qualities such as low supply voltage and low transistor gain.

This work analyzes system imperfections, circuit noise sources and error sources for several Sigma-Delta topologies, in order to find a suitable solution for the audio requirements. From this analysis it was found that there are two possible solutions, which are: fourth order continuous time Sigma-Delta with oversampling ratio of 32 and switched capacitor second order with oversampling ratio of 256. This work recommends using the second order switched capacitor circuit due to it stability and insensitivity to processes and temperature variations. For the switched capacitor option, a design solution is presented with full system simulation results. This design is analyzed to explore its supply voltage limitations.

 The analysis in this work is supported by behavioral model simulations, theoretical analysis and by Spice simulations.

As part of this research the fundamental limitation of the signal to noise ratio for switched capacitor Sigma-Delta modulators is developed as a function of the process parameters. This analysis can also be used to evaluate process capabilities in terms of analog circuit performance.