הטכניון מכון טכנולוגי לישראלXyz
הטכניון מכון טכנולוגי לישראל - בית הספר ללימודי מוסמכים 
Ph.D and MS.c Theses, since 1988.


Advisor Professor Emeritus Kolodny Avinoam
Advisor's Email kolodny@ee.technion.ac.il
Advisor's Home-Site www
No of theses 44
Department Electrical Engineering
Department Web Site webee.technion.ac.il/hebrew


No.   Student's Name Graduation
Year
Degree Abstracts Research Name
 1 Yifat Levy 2016 MSc Abstracts Digital Circuits Design Using Memristors
 2 Tomer Morad 2016 PhD Abstracts Energy- Efficient System Resource Allocation
 3 Eitan Zahavi 2016 PhD Abstracts Forwarding in Computer Cluster Networks
 4 Ran Manevich 2014 PhD Abstracts Centralized Paradigms in Network on Chip Architectures
 5 Shahar Kvatinsky 2014 PhD Abstracts Memristor-Based Circuits and Architectures
 6 Yaniv Ben-Itzhak 2014 PhD Abstracts Advanced Heterogeneous NoC Design
 7 Leon Polishuk 2013 MSc Abstracts Latency considerations for NoC interconnection fabrics
 8 Amnon Stanislavsky 2013 MSc Abstracts Power Driven Floorplan and Energy Efficient Adders
 9 Oved Izchak 2013 MSc Abstracts The Interaction between Workloads and Micro Architecture in Highly-Parallel Chip Multi-Processors
 10 Yaron Cohen 2012 MSc Abstracts Low Power D/A Converter Design Considerations
 11 Ameer Abdelhadi 2011 MSc Abstracts Timing-Driven Variation-Aware Synthesis of Hybrid Mesh/ Tree Clock Distribution Networks
 12 Victorya Vishnyakov 2011 MSc Abstracts Inductive Effects in On-Chip Interconnects
 13 Gregory Sizikov 2011 MSc Abstracts Design and Analysis of integrated voltage regulators
 14 Roman Malits 2011 MSc Abstracts The Potential of Global Scheduling to Improve Utilization in Wide SIMD GPGPU Architectures
 15 Konstantin Moiseev 2011 PhD Abstracts Optimization of Interconnects in CMOS Nanoscale Technologies
 16 Yaniv Ben-Itzhak 2010 MSc Abstracts Performance and Power Aware Thread Allocation for NoC CMP
 17 Shmuel Zobel 2010 MSc Abstracts Power Performance Tradeoffs in Graphics/GPGPU Based Systems
 18 Chen Damishian 2010 MSc Abstracts Stride Based Dead Block Correlation Prefetcher - A New Long-Latency-Tolerant Data Cache Prefetcher
 19 Zvika Guz 2010 PhD
The Interplay of Caches and Threads in Chip-Multiprocessors
 20 Anna Kouslik Elkin 2010 MSc Abstracts Macro Models for Power Estimation at RT Level in VLSI
 21 Isask'har Walter 2010 PhD Abstracts Network on Chip for Future CMP and SoC
 22 Yoni Aizik 2009 MSc Abstracts Design Considerations for Low Power CMOS Digital Circuits
 23 Evgeni Krimer 2009 MSc Abstracts Packet-Level Static Timing Analysis for On-Chip Networks
 24 Inna Vaisband 2009 MSc Abstracts Power Efficient Tree-Based Crosslinks for Skew Reduction
 25 Rostislav Dobkin 2009 PhD Abstracts High-Speed Asynchronous Communication for SoC
 26 Dror Barash 2008 MSc Abstracts Cache Manipulations Improve Multimedia Applications
 27 Iris Sorani 2008 MSc Abstracts Long Instruction Traces and their Usage
 28 Arkadiy Morgenshtein 2008 PhD Abstracts Design and Optimization of On-Chip Interconnect
 29 Michael Sotman 2007 MSc Abstracts Issues in Analysis and Design of Power Delivery Structures in VLSI
 30 Evgeny Bolotin 2007 PhD Abstracts Network on Chip
 31 Isask'har Walter 2006 MSc Abstracts Quality of Service in Network on-Chip
 32 Michael Behar 2006 MSc Abstracts Characterization of Hot Traces in Modern Processors
 33 Anastasia Kapchits 2006 MSc Abstracts Modeling and Design of Network on Chip Interconnects
 34 Tomer Morad 2005 MSc Abstracts Data Trace Cache
 35 Konstantin Moiseev 2005 MSc Abstracts Performance Optimization by Reordering of Interconnect Wires in VLSI
 36 Shay Michaely 2005 MSc Abstracts Wire Resizing for Optimal Migration of Microprocessors
 37 Michael Moreinis 2004 MSc Abstracts Repeater Insertion in Deep Sub-Micron VLSI Circuits
 38 Assad Khamaisee 2004 MSc Abstracts Combining Trace Cache with Value Prediction in Microprocessors
 39 Nir Magen 2004 MSc Abstracts Power Issues of On-Chip Interconnect in VLSI
 40 Oleg Milter 2002 MSc Abstracts Synthesis of CMOS VLSI Circuits Considering Digital Noise Effects
 41 George Shchupak 2002 MSc Abstracts High Speed, Low Power Medium Size Cache Design
 42 Oleg Kosyakovsky 2002 MSc Abstracts Approaches to Managing Trace Cache in Computer Systems
 43 Yaron Elboim 2002 MSc
A Clock Tuning Circuit for System-on-Chip
 44 Noam Dolev 2002 MSc Abstracts Integrated Low-Voltage Delta-Sigma Conversion Circuits in Digital CMOS Technology

Last updated on: Thursday ,June 20, 2019