|M.Sc Student||Javitt Michael|
|Subject||CMOS SPAD (Single Photon Avalanche Diode) for 3D Imaging|
|Department||Department of Electrical Engineering||Supervisor||Professor Emeritus Yael Nemirovsky|
|Full Thesis text|
High-sensitivity high speed low-cost arrays are a must for a variety of cutting edge applications including 3D imaging. However, currently available commercial devices suffer from a number of drawbacks such as high cost (CCD’s) or low sensitivity (CMOS-APS). CMOS Single Photon Avalanche Diodes provide the high speed and low cost provided by standard CMOS technology coupled with photon sensitivities to rival those of CCD’s - down to the single photon. The goal of a SPAD designer is to achieve high Photon Detection Efficiency (PDE), the probability of detecting a photon (analogous to quantum efficiency) while keeping spurious noise known as the Dark Count Rate (DCR) low. This is done through novel doping implants all within established standard CMOS technology.
In order to develop this technology to fruition, a strong understanding of the nature of these devices is necessary - how to construct a high performance SPAD, how it operates and how to utilize it for the intended application. However, previous attempts to model this behavior have only achieved partial success in reproducing measured results.
This work presents a novel model which accounts for the transient nature of the device and is accurately fitted to experimental data. Example uses of the model to optimize device design and performance are given. Additionally, 3D imaging techniques are examined and compared, focusing on direct and indirect Time-of-Flight approaches. Finally, a novel hybrid approach is presented that utilizes aspects of both methods to achieve higher performance.