|M.Sc Student||Hanna Alam|
|Subject||Do-It-Yourself Virtual Memory Translation|
|Department||Department of Electrical Engineering||Supervisor||Professor Etsion Yoav|
|Full Thesis text|
Emerging big-memory and virtualized workloads spend a substantial fraction of their time on virtual-to-physical address translation. This is due to one-size-fits-all page table translations that favor generality (via support for sparse virtual address spaces) over fast translations. This observation motivates the design of address translation mechanisms that allow application customization. Furthermore, custom translation mechanisms must preserve important system features such as paging and swapping, which are critical to common resource utilization optimizations in virtualized workloads.
This thesis addresses the above challenge in depth proposing Do-It-Yourself virtual memory translation (DVMT) architecture as a flexible complement for current hardware-fixed translation flows. DVMT decouples the virtual-to-physical mapping process from the access permissions, giving applications freedom in choosing mapping schemes, while maintaining security within the operating system.
Moreover, DVMT is designed to support virtualized environments, as a means to collapse the costly, hardware-assisted two-dimensional translations.
We envision that most common customized mappings will be handled by specialized memory allocators or tuned operating systems (library OSs, VM images, or containers); which will allow for an easy per-application optimizations.
Finally, we describe the architecture in detail and demonstrate its effectiveness by evaluating several different DVMT schemes on a range of virtualized applications with a model based on measurements from a commercial system. We evaluate the design on three mapping schemes: segment mapping, one-level indirection array mapping and hash-table mapping. We show that different DVMT configurations preserve the native performance, while achieving speedups of 1.2x to 2.0x in virtualized environments.