טכניון מכון טכנולוגי לישראל
הטכניון מכון טכנולוגי לישראל - בית הספר ללימודי מוסמכים  
M.Sc Thesis
M.Sc StudentGerman Alexey
SubjectDesign and Implementation of a Novel Dead Time Compensator
(DTC) for Quadruple Tank Process with
Multiple Delays (QTPwDT)
DepartmentDepartment of Mechanical Engineering
Supervisor Professor Emeritus Zalman Palmor
Full Thesis text - in Hebrew Full thesis text - Hebrew Version


Abstract

Multiple-Input/Multiple-Output (MIMO) processes with multiple delays are very common in industry, biology, economics, communication networks and in other areas as well. The most systematic structure used to control such processes is the Generalized Multi Delay Compensator (GMDC), which was developed twenty five years ago and is considered to be the state of the art extension to MIMO systems of the single delay Single-Input/Single-Output (SISO) dead time compensator (DTC).

Recently, a novel structure of DTC for MIMO systems with I/O (Input/Output) delays called FASP (Feedforward Action Smith Predictor) has been presented. Similar to the GMDC the FASP contains a predictor and a primary controller. However,  the FASP includes in addition novel blocks acting as feed forward controllers between output channels and input channels separately.

The FASP has been developed theoretically and  issues related to its implementation were not investigated until this research. Thus the objective of this research was twofold: to examine the feasibility of the design and the implementation of the FASP by controlling a laboratory MIMO system with multiple delays. And the second, to compare the performance of the GMDC and the FASP in practice. To this end a laboratory apparatus with two inputs and two outputs, called the Quadruple Tank Process with Dead Times, QTPwDT, was employed.

In the first part  of the research a method for extracting the multiple dead times  to the inputs and the outputs (the case for which  the FASP has been developed) with various objectives concerning the remaining dead times, was presented. Then the research addressed  the question of how to implement the high order rational blocks and the  FIR blocks based on a non-stable system. A standard way for order reduction was employed and several methods for FIR implementation were examined. The examination resulted in recommendations as to which method is suitable in a  particular case.

Finally both  simulations and  experiments were carried out on various configurations of the QTPwDT controlled by the FASP and the GMDC. Based upon the sum of Integral Square Error (ISE) from both channels it was concluded that the FASP is almost always superior to the GMDC both in simulations and experimental results.

Another important conclusion reached via the experimental results, was that in practice the artificial addition of delays, as done in the GMDC, does not improve the overall performance and even makes it worse.