טכניון מכון טכנולוגי לישראל
הטכניון מכון טכנולוגי לישראל - בית הספר ללימודי מוסמכים  
M.Sc Thesis
M.Sc StudentHochdorf Eyal
SubjectBlock Code Enhanced Low Density Parity Check Codes
DepartmentDepartment of Electrical Engineering
Supervisor Dr. Shraga Bross


Abstract

Sipser & Spielman considered a family of linear error-correcting codes that can be decoded in linear time. These codes are derived from expander graphs and they belong to the class of Low Density Parity Check Codes (LDPC) introduced by Gallger. To build expander codes, Sipser & Spielman use an expander graph and associated with each right node a constraint on the variables reaching that node. This approach suggests the replacement of the commonly used parity-check-code, as the constraint associated with each right-node in conventional LDPC code with an arbitrary error-correcting code having the same block length as the parity check code. Lentmaeir employed the same principle on the entire right-node constraints, and showed improved performance and better minimum distance relative to regular LDPC codes.

In this work, we consider regular bipartite graph in which part of the right (check) node are associated with block codes, stronger than the commonly used parity check code, e.g. Hamming or Reed-Muller codes, while the rest of the right node constraints are regular parity checks, thus generating a form of an irregular low-density code. Specifically we investigate the way in which various hard and soft decoding algorithms for block codes can be combined with the iterative decoding procedure, and how they influence the performance of the iterative decoder for the "mixed" low density irregular code. Finally, we consider the use of density evolution to predict the performance of such irregular "mixed" codes, and compare the results predicted by DE with actual simulation results for specific codes. We show that some of these "mixed" codes perform better than regular LDPC codes, for both hard and soft algorithms.