|M.Sc Thesis||Department of Electrical Engineering|
|Supervisor:||Prof. Ritter Dan|
The design of a broadband distributed preamplifier based upon an advanced transistor technology was studied. The building blocks of the amplifier were indium phosphide based heterojunction bipolar transistors (HBTs). This transistor technology is highly suitable for very high frequency applications. The bandwidth obtained was 95Ghz with 11db gain while maintaining good impedance match and group delay.
The circuit topology that resulted in optimal performance is an emitter follower stage connected to cascode configuration with the addition of a resistor inductance load at the emitter follower output. This improved topology made it possible to obtain the superior bandwidth performance mentioned above, which is about 20% larger than what can be obtained by other topologies such as cascode and FT doublers.
An important aspect of the research was to optimize the transistor structure for obtaining maximum bandwidth. Scalable large signal and small signal transistor models were used to study the influence of transistor parameters on circuit performance.
The design of high frequency circuits critically depends on the physical layout of the circuit. Coplanar waveguide were used in this research. It was found that peaking lines between transistor stages improve bandwidth without having any affect on the impedance match and group delay. The final chip size is just 1 mm x 0.5 mm. It contains 16 HBTs. The power consumption is 200 mW, a relatively low value for large bandwidth circuits.
Finally, a noise model of the HBT was introduced, and used to calculate the distributed amplifier noise behavior. It is shown that due to the small gain of the active device the collector shot noise determines the circuit noise.